Colin’s comment on my last post about CocoNES got me thinking, and now I’m strongly leaning toward abandoning Cocoa for the 2A03 and 2C02 parts and writing them in straight-up C with Core Foundation. This should help keep the overhead low while still letting me insert the cores easily into the virtual machine and ultimately the Cocoa shell.

My only concern about following that method would be the threading. I’m still hammering out the details of how I want that to work. There are two things that seriously complicate matters: first, each instruction takes multiple clock cycles. Secondly, like most 8-bit MPUs the 2A03 (6502, for all intents and purposes) has some minor parallelism going in where for most (but I don’t believe all) instructions the opcode for the next instruction is fetched while the current instruction finishes execution. My main concern is that I need to have the correct address and data on the buses at the right time; that’s probably the most complicated part of this whole endeavour until I need to do optimization. I already know for sure I’m going to launch one thread for the entire virtual machine so it doesn’t block the event loop. Do I want to launch separate threads for the 2A03 and 2C02? Do I need two threads to account for the parallelism in the 2A03? If so, how do I go about that?

I will say though that my investigations into CF (thanks again, Colin!) have given me one good idea. I was originally planning to use a switch() block to decode the opcode, but now I’m thinking I can make an array of pointers to functions, since it looks like I’ll be using pure C for the core. That will seriously cut down some branch work, and should be very easy to implement since 1) all opcodes are void functions with no arguments and 2) opcodes are just 1-byte numbers, so I can read the opcode and voila! Array index!